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Update asm

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This commit is contained in:
Minseong Jang
2022-01-25 17:22:58 +09:00
parent a843992e8f
commit 4902bd6d9f
1 changed files with 20 additions and 20 deletions
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40
src/asm/mod.rs
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@@ -4,22 +4,22 @@ use crate::ir;
use core::convert::TryFrom; use core::convert::TryFrom;
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub struct Todo {} pub struct Todo {}
/// TODO /// TODO
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub struct Asm { pub struct Asm {
pub unit: TranslationUnit, pub unit: TranslationUnit,
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub struct TranslationUnit { pub struct TranslationUnit {
pub functions: Vec<Section<Function>>, pub functions: Vec<Section<Function>>,
pub variables: Vec<Section<Variable>>, pub variables: Vec<Section<Variable>>,
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub struct Section<T> { pub struct Section<T> {
/// Section Headers provice size, offset, type, alignment and flags of the sections /// Section Headers provice size, offset, type, alignment and flags of the sections
/// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#section-header /// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#section-header
@@ -36,7 +36,7 @@ impl<T> Section<T> {
} }
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub struct Function { pub struct Function {
pub blocks: Vec<Block>, pub blocks: Vec<Block>,
} }
@@ -47,7 +47,7 @@ impl Function {
} }
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub struct Variable { pub struct Variable {
pub label: Label, pub label: Label,
pub directives: Vec<Directive>, pub directives: Vec<Directive>,
@@ -59,7 +59,7 @@ impl Variable {
} }
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub struct Block { pub struct Block {
pub label: Option<Label>, pub label: Option<Label>,
pub instructions: Vec<Instruction>, pub instructions: Vec<Instruction>,
@@ -77,7 +77,7 @@ impl Block {
/// The assembler implements a number of directives that control the assembly of instructions /// The assembler implements a number of directives that control the assembly of instructions
/// into an object file. /// into an object file.
/// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#assembler-directives /// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#assembler-directives
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum Directive { pub enum Directive {
/// .align integer /// .align integer
Align(usize), Align(usize),
@@ -112,7 +112,7 @@ impl Directive {
} }
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum SectionType { pub enum SectionType {
Text, Text,
Data, Data,
@@ -120,13 +120,13 @@ pub enum SectionType {
Bss, Bss,
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum SymbolType { pub enum SymbolType {
Function, Function,
Object, Object,
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum Instruction { pub enum Instruction {
/// R-type instruction format /// R-type instruction format
/// https://riscv.org/specifications/isa-spec-pdf/ (16p, 129p) /// https://riscv.org/specifications/isa-spec-pdf/ (16p, 129p)
@@ -171,7 +171,7 @@ pub enum Instruction {
/// If the enum variant contains `bool`, /// If the enum variant contains `bool`,
/// It means that different instructions exist /// It means that different instructions exist
/// depending on whether the operand is signed or not. /// depending on whether the operand is signed or not.
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum RType { pub enum RType {
Add(DataSize), Add(DataSize),
Sub(DataSize), Sub(DataSize),
@@ -398,7 +398,7 @@ impl RType {
} }
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum IType { pub enum IType {
Load { Load {
data_size: DataSize, data_size: DataSize,
@@ -474,7 +474,7 @@ impl IType {
} }
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum SType { pub enum SType {
Store(DataSize), Store(DataSize),
} }
@@ -490,7 +490,7 @@ impl SType {
} }
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum BType { pub enum BType {
Beq, Beq,
Bne, Bne,
@@ -498,7 +498,7 @@ pub enum BType {
Bge { is_signed: bool }, Bge { is_signed: bool },
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum UType { pub enum UType {
Lui, Lui,
} }
@@ -508,7 +508,7 @@ pub enum UType {
/// that result in distinct semantics. /// that result in distinct semantics.
/// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#assembler-pseudo-instructions /// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#assembler-pseudo-instructions
/// https://riscv.org/specifications/isa-spec-pdf/ (139p) /// https://riscv.org/specifications/isa-spec-pdf/ (139p)
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum Pseudo { pub enum Pseudo {
/// la rd, symbol /// la rd, symbol
La { rd: Register, symbol: Label }, La { rd: Register, symbol: Label },
@@ -574,7 +574,7 @@ impl Pseudo {
} }
} }
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum Immediate { pub enum Immediate {
// TODO: consider architecture dependency (current: 64-bit architecture) // TODO: consider architecture dependency (current: 64-bit architecture)
Value(u64), Value(u64),
@@ -594,7 +594,7 @@ impl Immediate {
/// The relocation function creates synthesize operand values that are resolved /// The relocation function creates synthesize operand values that are resolved
/// at program link time and are used as immediate parameters to specific instructions. /// at program link time and are used as immediate parameters to specific instructions.
/// https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md /// https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md
#[derive(Debug, Clone, PartialEq)] #[derive(Debug, Clone, PartialEq, Eq)]
pub enum RelocationFunction { pub enum RelocationFunction {
/// %hi /// %hi
Hi20, Hi20,
@@ -614,7 +614,7 @@ impl Label {
} }
} }
#[derive(Debug, Clone, Copy, PartialEq)] #[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum DataSize { pub enum DataSize {
Byte, Byte,
Half, Half,