Update skeleton

examples/simplify_cfg/const_prop.input.ir

@@ -0,0 +1,98 @@
+fun i32 @const_prop_same {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  br undef:i1 b1() b1()
+
+block b1:
+  ret 0:i1
+}
+
+fun i32 @const_prop_true {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  br 1:i1 b1() b2()
+
+block b1:
+  ret 0:i1
+
+block b2:
+  ret 0:i1
+}
+
+fun i32 @const_prop_false {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  br 0:i1 b1() b2()
+
+block b1:
+  ret 0:i1
+
+block b2:
+  ret 0:i1
+}
+
+fun i32 @const_prop_switch_same {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  switch 42:i32 default b1() [
+    2:i32 b1()
+    3:i32 b1()
+  ]
+
+block b1:
+  ret 0:i1
+}
+
+fun i32 @const_prop_switch_case {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  switch 2:i32 default b1() [
+    2:i32 b2()
+    3:i32 b3()
+  ]
+
+block b1:
+  ret 0:i1
+
+block b2:
+  ret 0:i1
+
+block b3:
+  ret 0:i1
+}
+
+fun i32 @const_prop_switch_default {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  switch 42:i32 default b1() [
+    2:i32 b2()
+    3:i32 b3()
+  ]
+
+block b1:
+  ret 0:i1
+
+block b2:
+  ret 0:i1
+
+block b3:
+  ret 0:i1
+}

examples/simplify_cfg/const_prop.output.ir

@@ -0,0 +1,94 @@
+fun i32 @const_prop_same {
+init:
+  bid: b0
+  allocations: 
+
+
+block b0:
+  j b1()
+
+block b1:
+  ret 0:i1
+}
+
+fun i32 @const_prop_true {
+init:
+  bid: b0
+  allocations: 
+
+
+block b0:
+  j b1()
+
+block b1:
+  ret 0:i1
+
+block b2:
+  ret 0:i1
+}
+
+fun i32 @const_prop_false {
+init:
+  bid: b0
+  allocations: 
+
+
+block b0:
+  j b2()
+
+block b1:
+  ret 0:i1
+
+block b2:
+  ret 0:i1
+}
+
+fun i32 @const_prop_switch_same {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  j b1()
+
+block b1:
+  ret 0:i1
+}
+
+fun i32 @const_prop_switch_case {
+init:
+  bid: b0
+  allocations: 
+
+
+block b0:
+  j b2()
+
+block b1:
+  ret 0:i1
+
+block b2:
+  ret 0:i1
+
+block b3:
+  ret 0:i1
+}
+
+fun i32 @const_prop_switch_default {
+init:
+  bid: b0
+  allocations: 
+
+
+block b0:
+  j b1()
+
+block b1:
+  ret 0:i1
+
+block b2:
+  ret 0:i1
+
+block b3:
+  ret 0:i1
+}

examples/simplify_cfg/empty.input.ir

@@ -0,0 +1,35 @@
+fun i32 @foo {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  j b1(42:i32)
+
+block b1:
+  %b1:p0:i32
+  j b3()
+
+block b3:
+  ret 37:i32
+}
+
+fun i32 @bar {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  j b1(42:i32)
+
+block b1:
+  %b1:p0:i32
+  br 1:i1 b2() b2()
+
+block b2:
+  j b3()
+
+block b3:
+  %b3:i0:i1 = cmp eq 0:i32 0:i32
+  ret 37:i32
+}

examples/simplify_cfg/empty.output.ir

@@ -0,0 +1,35 @@
+fun i32 @foo {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  j b1(42:i32)
+
+block b1:
+  %b1:p0:i32
+  ret 37:i32
+
+block b3:
+  ret 37:i32
+}
+
+fun i32 @bar {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  j b1(42:i32)
+
+block b1:
+  %b1:p0:i32
+  br 1:i1 b3() b3()
+
+block b2:
+  j b3()
+
+block b3:
+  %b3:i0:i1 = cmp eq 0:i32 0:i32
+  ret 37:i32
+}

examples/simplify_cfg/merge.input.ir

@@ -0,0 +1,14 @@
+fun i32 @foo {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  j b1(42:i32, 37:i32)
+
+block b1:
+  %b1:p0:i32
+  %b1:p1:i32
+  %b1:i0:i32 = add %b1:p0:i32 %b1:p1:i32
+  ret %b1:i0:i32
+}

examples/simplify_cfg/merge.output.ir

@@ -0,0 +1,9 @@
+fun i32 @foo {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  %b0:i0:i32 = add 42:i32 37:i32
+  ret %b0:i0:i32
+}

examples/simplify_cfg/reach.input.ir

@@ -0,0 +1,17 @@
+fun i32 @foo {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  j b1()
+
+block b1:
+  j b0()
+
+block b2:
+  j b3()
+  
+block b3:
+  j b2()
+}

examples/simplify_cfg/reach.output.ir

@@ -0,0 +1,11 @@
+fun i32 @foo {
+init:
+  bid: b0
+  allocations: 
+
+block b0:
+  j b1()
+
+block b1:
+  j b0()
+}