mirror of
https://github.com/kmc7468/cs420.git
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Update skeleton
This commit is contained in:
Jeehoon Kang
257
src/asm/mod.rs
257
src/asm/mod.rs
@@ -1,4 +1,259 @@
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mod write_asm;
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use crate::ir;
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use core::convert::TryFrom;
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#[derive(Debug, Clone, PartialEq)]
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pub struct TODO {}
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/// TODO
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pub struct Asm {}
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#[derive(Debug, Clone, PartialEq)]
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pub struct Asm {
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pub unit: TranslationUnit,
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}
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#[derive(Debug, Clone, PartialEq)]
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pub struct TranslationUnit {
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pub functions: Vec<Section<Function>>,
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pub variables: Vec<Section<Variable>>,
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}
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#[derive(Debug, Clone, PartialEq)]
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pub struct Section<T> {
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/// Section Headers provice size, offset, type, alignment and flags of the sections
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/// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#section-header
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pub header: Vec<Directive>,
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pub body: T,
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}
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/// An object file is made up of multiple sections, with each section corresponding to
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/// distinct types of executable code or data.
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/// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#sections
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impl<T> Section<T> {
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pub fn new(header: Vec<Directive>, body: T) -> Self {
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Self { header, body }
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}
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}
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#[derive(Debug, Clone, PartialEq)]
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pub struct Function {
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pub blocks: Vec<Block>,
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}
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impl Function {
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pub fn new(blocks: Vec<Block>) -> Self {
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Self { blocks }
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}
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}
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#[derive(Debug, Clone, PartialEq)]
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pub struct Variable {
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todo: TODO,
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}
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#[derive(Debug, Clone, PartialEq)]
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pub struct Block {
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pub label: Option<Label>,
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pub instructions: Vec<Instruction>,
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}
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impl Block {
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pub fn new(label: Option<Label>, instructions: Vec<Instruction>) -> Self {
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Self {
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label,
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instructions,
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}
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}
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}
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/// The assembler implements a number of directives that control the assembly of instructions
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/// into an object file.
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/// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#assembler-directives
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#[derive(Debug, Clone, PartialEq)]
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pub enum Directive {
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/// .globl symbol
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Globl(Label),
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/// .type symbol, symbol_type
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Type(Label, SymbolType),
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}
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#[derive(Debug, Clone, PartialEq)]
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pub enum SymbolType {
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Function,
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Object,
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}
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#[derive(Debug, Clone, PartialEq)]
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pub enum Instruction {
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/// R-type instruction format
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/// https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf (11p, 104p)
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RType {
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instr: RType,
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rd: Register,
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rs1: Register,
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rs2: Register,
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},
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/// I-type instruction format
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/// https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf (11p, 104p)
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IType {
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instr: IType,
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rd: Register,
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rs1: Register,
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imm: isize,
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},
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/// S-type instruction format
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/// https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf (11p, 104p)
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SType {
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instr: SType,
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rs1: Register,
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rs2: Register,
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imm: isize,
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},
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Pseudo(Pseudo),
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}
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#[derive(Debug, Clone, PartialEq)]
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pub enum RType {
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Add(Option<DataSize>),
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Mul(Option<DataSize>),
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}
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#[derive(Debug, Clone, PartialEq)]
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pub enum IType {
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Load(DataSize),
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Addi(Option<DataSize>),
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}
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impl IType {
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pub const LW: Self = Self::Load(DataSize::Word);
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pub const LD: Self = Self::Load(DataSize::Double);
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pub const ADDI: Self = Self::Addi(None);
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pub fn load(dtype: ir::Dtype) -> Self {
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let data_align =
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DataSize::try_from(dtype).expect("`data_align` must be derived from `dtype`");
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Self::Load(data_align)
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}
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}
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#[derive(Debug, Clone, PartialEq)]
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pub enum SType {
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Store(DataSize),
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}
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impl SType {
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pub const SW: Self = Self::Store(DataSize::Word);
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pub const SD: Self = Self::Store(DataSize::Double);
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pub fn store(dtype: ir::Dtype) -> Self {
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let data_align =
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DataSize::try_from(dtype).expect("`data_align` must be derived from `dtype`");
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Self::Store(data_align)
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}
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}
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/// The assembler implements a number of convenience psuedo-instructions that are formed from
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/// instructions in the base ISA, but have implicit arguments or in some case reversed arguments,
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/// that result in distinct semantics.
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/// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#assembler-pseudo-instructions
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/// https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf (110p)
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#[derive(Debug, Clone, PartialEq)]
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pub enum Pseudo {
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/// li rd, immediate
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Li { rd: Register, imm: isize },
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/// mv rd, rs
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Mv { rs: Register, rd: Register },
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/// sext.w rd, rs
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SextW { rs: Register, rd: Register },
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/// j offset
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J { offset: Label },
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/// jr rs
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Jr { rs: Register },
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/// ret
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Ret,
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/// call offset
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Call { offset: Label },
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}
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/// `Label` is used as branch, unconditional jump targets and symbol offsets.
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/// https://github.com/rv8-io/rv8-io.github.io/blob/master/asm.md#labels
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#[derive(Debug, Clone, PartialEq, Eq, PartialOrd, Ord)]
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pub struct Label(pub String);
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impl Label {
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pub fn new(name: &str, block_id: ir::BlockId) -> Self {
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let id = block_id.0;
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Self(format!(".{}_L{}", name, id))
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}
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}
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#[derive(Debug, Clone, PartialEq)]
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pub enum DataSize {
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Byte,
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Half,
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Word,
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Double,
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}
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impl TryFrom<ir::Dtype> for DataSize {
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type Error = ();
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fn try_from(dtype: ir::Dtype) -> Result<Self, Self::Error> {
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let width = match dtype {
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ir::Dtype::Int { width, .. } => width,
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_ => todo!(),
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};
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let size = (width - 1) / ir::Dtype::BITS_OF_BYTE + 1;
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let align = match size {
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ir::Dtype::SIZE_OF_CHAR => Self::Byte,
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ir::Dtype::SIZE_OF_SHORT => Self::Half,
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ir::Dtype::SIZE_OF_INT => Self::Word,
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ir::Dtype::SIZE_OF_LONG => Self::Double,
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_ => panic!("there is no other possible case"),
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};
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Ok(align)
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}
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}
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// TODO: Add calling convention information (caller/callee-save registers)
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/// ABI name for RISC-V integer and floating-point register
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/// https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf (109p)
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#[derive(Debug, Clone, PartialEq, Eq, Hash, Copy)]
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pub enum Register {
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Zero,
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Ra,
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Sp,
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Gp,
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Tp,
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/// E.g., t0
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Temp(usize),
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/// E.g., s0
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Saved(usize),
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/// E.g., a0
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Arg(usize),
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}
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impl Register {
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// TODO: add all possible registers in the future
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pub const S0: Self = Self::Saved(0);
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pub const A0: Self = Self::Arg(0);
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pub const A5: Self = Self::Arg(5);
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pub fn temp(id: usize) -> Self {
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assert!(id <= 6);
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Self::Temp(id)
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}
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pub fn saved(id: usize) -> Self {
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assert!(id <= 11);
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Self::Saved(id)
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}
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pub fn arg(id: usize) -> Self {
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assert!(id <= 7);
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Self::Arg(id)
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}
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}
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@@ -1,10 +1,213 @@
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use std::io::{Result, Write};
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use crate::asm::Asm;
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use crate::write_base::WriteLine;
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use crate::asm::*;
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use crate::write_base::*;
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const INDENT: usize = 4;
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impl WriteLine for Asm {
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fn write_line(&self, indent: usize, write: &mut dyn Write) -> Result<()> {
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self.unit.write_line(indent, write)
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}
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}
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impl WriteLine for TranslationUnit {
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fn write_line(&self, indent: usize, write: &mut dyn Write) -> Result<()> {
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for function in &self.functions {
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function.write_line(indent, write)?;
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}
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for variable in &self.variables {
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variable.write_line(indent, write)?;
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}
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Ok(())
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}
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}
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impl<T: WriteLine> WriteLine for Section<T> {
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fn write_line(&self, indent: usize, write: &mut dyn Write) -> Result<()> {
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for directive in &self.header {
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write_indent(indent + INDENT, write)?;
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writeln!(write, "{}", directive.write_string())?;
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}
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self.body.write_line(indent, write)?;
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Ok(())
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}
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}
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impl WriteLine for Function {
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fn write_line(&self, indent: usize, write: &mut dyn Write) -> Result<()> {
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for block in &self.blocks {
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block.write_line(indent, write)?;
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}
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Ok(())
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}
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}
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impl WriteLine for Variable {
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fn write_line(&self, _indent: usize, _write: &mut dyn Write) -> Result<()> {
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todo!()
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}
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}
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impl WriteLine for Block {
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fn write_line(&self, indent: usize, write: &mut dyn Write) -> Result<()> {
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if let Some(label) = &self.label {
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writeln!(write, "{}:", label.0)?;
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}
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for instruction in &self.instructions {
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write_indent(indent + INDENT, write)?;
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writeln!(write, "{}", instruction.write_string())?;
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}
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Ok(())
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}
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}
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impl WriteString for Directive {
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fn write_string(&self) -> String {
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match self {
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Self::Globl(label) => format!(".globl\t{}", label.0),
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Self::Type(symbol, symbol_type) => {
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format!(".type\t{}, {}", symbol.0, symbol_type.write_string())
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}
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}
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}
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}
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impl WriteString for SymbolType {
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fn write_string(&self) -> String {
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match self {
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Self::Function => "@function",
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Self::Object => "@object",
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}
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.to_string()
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}
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}
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impl WriteString for Instruction {
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fn write_string(&self) -> String {
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match self {
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Self::RType {
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instr,
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rd,
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rs1,
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rs2,
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} => format!(
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"{}\t{},{},{}",
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instr.write_string(),
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rd.write_string(),
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rs1.write_string(),
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rs2.write_string()
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),
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Self::IType {
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instr,
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rd,
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rs1,
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imm,
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} => {
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if let IType::Load(_) = instr {
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format!(
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"{}\t{},{}({})",
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instr.write_string(),
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rd.write_string(),
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imm,
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rs1.write_string()
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)
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} else {
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format!(
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"{}\t{},{},{}",
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instr.write_string(),
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rd.write_string(),
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rs1.write_string(),
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imm
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)
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}
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}
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Self::SType {
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instr,
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rs1,
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rs2,
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imm,
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} => format!(
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"{}\t{},{}({})",
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instr.write_string(),
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rs2.write_string(),
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imm,
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rs1.write_string()
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),
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Self::Pseudo(pseudo) => pseudo.write_string(),
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}
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}
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}
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impl WriteString for RType {
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fn write_string(&self) -> String {
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match self {
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Self::Add(data_size) => format!("add{}", data_size.write_string()),
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Self::Mul(data_size) => format!("mul{}", data_size.write_string()),
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}
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}
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}
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impl WriteString for IType {
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fn write_string(&self) -> String {
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match self {
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Self::Load(data_size) => format!("l{}", data_size.write_string()),
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Self::Addi(data_size) => format!("addi{}", data_size.write_string()),
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}
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}
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}
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impl WriteString for SType {
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fn write_string(&self) -> String {
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match self {
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Self::Store(data_size) => format!("s{}", data_size.write_string()),
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}
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}
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}
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impl WriteString for Pseudo {
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fn write_string(&self) -> String {
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match self {
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Self::Li { rd, imm } => format!("li\t{},{}", rd.write_string(), imm),
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Self::Mv { rs, rd } => format!("mv\t{},{}", rd.write_string(), rs.write_string()),
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Self::SextW { .. } => todo!(),
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Self::J { offset } => format!("j\t{}", offset.0),
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Self::Jr { rs } => format!("jr\t{}", rs.write_string()),
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Self::Ret => "ret".to_string(),
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Self::Call { offset } => format!("call\t{}", offset.0),
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}
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}
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}
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impl WriteString for DataSize {
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fn write_string(&self) -> String {
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match self {
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Self::Byte => "b",
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Self::Half => "h",
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Self::Word => "w",
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Self::Double => "d",
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}
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.to_string()
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}
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}
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impl WriteString for Register {
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fn write_string(&self) -> String {
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match self {
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Self::Zero => "zero".to_string(),
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Self::Ra => "ra".to_string(),
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Self::Sp => "sp".to_string(),
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Self::Gp => "gp".to_string(),
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Self::Tp => "tp".to_string(),
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Self::Temp(id) => format!("t{}", id),
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Self::Saved(id) => format!("s{}", id),
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Self::Arg(id) => format!("a{}", id),
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}
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}
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}
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