mirror of
https://github.com/kmc7468/cs420.git
synced 2025-12-14 22:38:46 +00:00
HW8 (1)
This commit is contained in:
static
@@ -61,6 +61,25 @@ impl Asmgen {
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));
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}
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}
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self.variables.push(asm::Section::new(
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vec![
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asm::Directive::Globl(asm::Label(name.clone())),
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asm::Directive::Section(asm::SectionType::Data),
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asm::Directive::Type(asm::Label(name.clone()), asm::SymbolType::Object),
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],
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asm::Variable::new(asm::Label(name.clone()), directives),
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));
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} else {
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let mut directives = Vec::new();
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match dtype {
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ir::Dtype::Array { inner, size } => directives.push(asm::Directive::Zero(
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size * (get_dtype_size(inner, structs) as usize),
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)),
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_ => directives
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.push(asm::Directive::Zero(get_dtype_size(dtype, structs) as usize)),
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}
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self.variables.push(asm::Section::new(
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vec![
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asm::Directive::Globl(asm::Label(name.clone())),
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@@ -188,15 +207,19 @@ impl Asmgen {
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let mut num_int_args = 0;
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let mut num_float_args = 0;
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if is_struct(&signature.ret, structs).is_some() {
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num_int_args += 1;
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if let Some(size) = is_struct(&signature.ret, structs) {
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if size > 16 {
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num_int_args += 1;
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}
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}
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let mut large_struct = HashMap::new();
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for (i, dtype) in signature.params.iter().enumerate() {
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let stack_offset = stack_offsets[&ir::RegisterId::arg(definition.bid_init, i)];
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if is_integer(dtype) {
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self.translate_store(
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asm::SType::SD,
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asm::SType::store(dtype.clone()),
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asm::Register::S0,
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asm::Register::arg(asm::RegisterType::Integer, num_int_args),
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stack_offset,
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@@ -212,6 +235,113 @@ impl Asmgen {
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&mut insts,
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);
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num_float_args += 1;
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} else if let Some(size) = is_struct(dtype, structs) {
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if size > 16 {
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let _ = large_struct.insert(i, num_int_args);
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num_int_args += 1;
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} else {
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let struct_name = dtype.get_struct_name().unwrap().as_ref().unwrap().clone();
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let struct_dtype = structs[&struct_name].clone().unwrap();
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let fields = struct_dtype.get_struct_fields().unwrap().as_ref().unwrap();
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let mut is_packing = false;
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let mut packing_start_offset = 0;
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let mut packing_size = 0;
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for field_dtype in fields {
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let (offset, _) = struct_dtype
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.get_offset_struct_field(field_dtype.name().unwrap(), structs)
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.unwrap();
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let field_size = get_dtype_size(&field_dtype, structs);
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if is_integer(&field_dtype) {
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if !is_packing {
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is_packing = true;
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packing_start_offset = offset;
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packing_size = field_size;
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} else {
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if offset == packing_start_offset + (packing_size as usize)
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&& packing_size + field_size <= 8
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{
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packing_size += field_size;
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} else {
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self.translate_addi(
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asm::Register::T5,
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asm::Register::S0,
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stack_offset,
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&mut insts,
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);
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insts.push(asm::Instruction::SType {
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instr: asm::SType::SD,
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rs1: asm::Register::T5,
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rs2: asm::Register::arg(
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asm::RegisterType::Integer,
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num_int_args,
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),
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imm: asm::Immediate::Value(packing_start_offset as u64),
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});
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num_int_args += 1;
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packing_start_offset = offset;
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packing_size = field_size;
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}
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}
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} else if is_float(&field_dtype) {
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if is_packing {
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self.translate_addi(
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asm::Register::T5,
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asm::Register::S0,
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stack_offset,
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&mut insts,
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);
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insts.push(asm::Instruction::SType {
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instr: asm::SType::SD,
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rs1: asm::Register::T5,
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rs2: asm::Register::arg(
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asm::RegisterType::Integer,
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num_int_args,
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),
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imm: asm::Immediate::Value(packing_start_offset as u64),
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});
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num_int_args += 1;
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is_packing = false;
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}
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self.translate_addi(
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asm::Register::T5,
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asm::Register::S0,
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stack_offset,
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&mut insts,
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);
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insts.push(asm::Instruction::SType {
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instr: asm::SType::store(field_dtype.deref().clone()),
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rs1: asm::Register::T5,
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rs2: asm::Register::arg(
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asm::RegisterType::FloatingPoint,
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num_float_args,
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),
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imm: asm::Immediate::Value(offset as u64),
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});
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num_float_args += 1;
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} else {
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todo!()
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}
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}
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if is_packing {
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self.translate_addi(
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asm::Register::T5,
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asm::Register::S0,
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stack_offset,
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&mut insts,
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);
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insts.push(asm::Instruction::SType {
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instr: asm::SType::SD,
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rs1: asm::Register::T5,
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rs2: asm::Register::arg(asm::RegisterType::Integer, num_int_args),
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imm: asm::Immediate::Value(packing_start_offset as u64),
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});
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num_int_args += 1;
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}
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}
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}
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}
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@@ -237,46 +367,49 @@ impl Asmgen {
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for (i, dtype) in signature.params.iter().enumerate() {
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let stack_offset = stack_offsets[&ir::RegisterId::arg(definition.bid_init, i)];
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if let Some(size) = is_struct(dtype, structs) {
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self.translate_addi(
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asm::Register::A0,
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asm::Register::S0,
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stack_offset,
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&mut insts,
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);
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if size > 16 {
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let reg_index = large_struct[&i];
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match i {
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0 => insts.push(asm::Instruction::IType {
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instr: asm::IType::LD,
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rd: asm::Register::A1,
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rs1: asm::Register::S0,
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imm: asm::Immediate::Value(!24 + 1),
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}),
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1 => insts.push(asm::Instruction::IType {
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instr: asm::IType::LD,
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rd: asm::Register::A1,
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rs1: asm::Register::Sp,
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imm: asm::Immediate::Value(0),
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}),
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2 => insts.push(asm::Instruction::IType {
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instr: asm::IType::LD,
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rd: asm::Register::A1,
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rs1: asm::Register::Sp,
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imm: asm::Immediate::Value(8),
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}),
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_ => insts.push(asm::Instruction::Pseudo(asm::Pseudo::Mv {
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rd: asm::Register::A1,
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rs: asm::Register::arg(asm::RegisterType::Integer, i),
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})),
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self.translate_addi(
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asm::Register::A0,
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asm::Register::S0,
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stack_offset,
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&mut insts,
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);
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match reg_index {
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0 => insts.push(asm::Instruction::IType {
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instr: asm::IType::LD,
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rd: asm::Register::A1,
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rs1: asm::Register::S0,
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imm: asm::Immediate::Value(!24 + 1),
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}),
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1 => insts.push(asm::Instruction::IType {
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instr: asm::IType::LD,
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rd: asm::Register::A1,
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rs1: asm::Register::Sp,
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imm: asm::Immediate::Value(0),
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}),
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2 => insts.push(asm::Instruction::IType {
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instr: asm::IType::LD,
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rd: asm::Register::A1,
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rs1: asm::Register::Sp,
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imm: asm::Immediate::Value(8),
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}),
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_ => insts.push(asm::Instruction::Pseudo(asm::Pseudo::Mv {
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rd: asm::Register::A1,
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rs: asm::Register::arg(asm::RegisterType::Integer, reg_index),
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})),
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}
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insts.push(asm::Instruction::Pseudo(asm::Pseudo::Li {
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rd: asm::Register::A2,
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imm: size,
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}));
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insts.push(asm::Instruction::Pseudo(asm::Pseudo::Call {
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offset: asm::Label(String::from("memcpy")),
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}));
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}
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insts.push(asm::Instruction::Pseudo(asm::Pseudo::Li {
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rd: asm::Register::A2,
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imm: size,
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}));
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insts.push(asm::Instruction::Pseudo(asm::Pseudo::Call {
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offset: asm::Label(String::from("memcpy")),
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}));
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num_int_args += 1;
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}
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}
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@@ -441,6 +574,9 @@ impl Asmgen {
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rs1,
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rs2: Some(rs2),
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});
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context
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.insts
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.push(asm::Instruction::Pseudo(asm::Pseudo::Snez { rd, rs: rd }));
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}
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ast::BinaryOperator::Less => {
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if is_integer(&operand_dtype) {
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@@ -716,7 +852,7 @@ impl Asmgen {
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let value_dtype = ptr_dtype.get_pointer_inner().unwrap().clone();
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if let Some(size) = is_struct(&value_dtype, structs) {
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match ptr_rid {
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ir::RegisterId::Temp { .. } => {
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ir::RegisterId::Temp { .. } | ir::RegisterId::Arg { .. } => {
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let rs1 = get_rhs_register(ptr_dtype);
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self.translate_load_operand(ptr, rs1, context);
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self.translate_addi(
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@@ -773,7 +909,7 @@ impl Asmgen {
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} else {
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let rd = get_lhs_register(&value_dtype);
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match ptr_rid {
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ir::RegisterId::Temp { .. } => {
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ir::RegisterId::Temp { .. } | ir::RegisterId::Arg { .. } => {
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let rs1 = get_rhs_register(ptr_dtype);
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self.translate_load_operand(ptr, rs1, context);
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context.insts.push(asm::Instruction::IType {
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@@ -813,14 +949,18 @@ impl Asmgen {
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// 구조체 반환을 위한 공간 예약
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if let Some(size) = is_struct(return_type, structs) {
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num_int_args += 1;
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struct_stack_allocations += ceil_to_multiple_of_16(size);
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if size > 16 {
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num_int_args += 1;
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struct_stack_allocations += ceil_to_multiple_of_16(size);
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}
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}
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for (i, arg) in args.iter().enumerate() {
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if let Some(size) = is_struct(&arg.dtype(), structs) {
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let _ = struct_stack_offsets.insert(i, struct_stack_allocations);
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struct_stack_allocations += ceil_to_multiple_of_16(size);
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if size > 16 {
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let _ = struct_stack_offsets.insert(i, struct_stack_allocations);
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struct_stack_allocations += ceil_to_multiple_of_16(size);
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}
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}
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}
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@@ -836,37 +976,39 @@ impl Asmgen {
|
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// 구조체 인수 복사
|
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for (i, arg) in args.iter().enumerate() {
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if let Some(size) = is_struct(&arg.dtype(), structs) {
|
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self.translate_addi(
|
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asm::Register::A0,
|
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asm::Register::Sp,
|
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struct_stack_offsets[&i],
|
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&mut context.insts,
|
||||
);
|
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match arg {
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ir::Operand::Register { rid, .. } => match rid {
|
||||
ir::RegisterId::Temp { bid, iid } => {
|
||||
self.translate_addi(
|
||||
asm::Register::A1,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
}
|
||||
if size > 16 {
|
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self.translate_addi(
|
||||
asm::Register::A0,
|
||||
asm::Register::Sp,
|
||||
struct_stack_offsets[&i],
|
||||
&mut context.insts,
|
||||
);
|
||||
match arg {
|
||||
ir::Operand::Register { rid, .. } => match rid {
|
||||
ir::RegisterId::Temp { bid, iid } => {
|
||||
self.translate_addi(
|
||||
asm::Register::A1,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
}
|
||||
_ => todo!(),
|
||||
},
|
||||
_ => todo!(),
|
||||
},
|
||||
_ => todo!(),
|
||||
}
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Li {
|
||||
rd: asm::Register::A2,
|
||||
imm: size,
|
||||
}));
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Call {
|
||||
offset: asm::Label(String::from("memcpy")),
|
||||
}));
|
||||
}
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Li {
|
||||
rd: asm::Register::A2,
|
||||
imm: size,
|
||||
}));
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Call {
|
||||
offset: asm::Label(String::from("memcpy")),
|
||||
}));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -890,25 +1032,136 @@ impl Asmgen {
|
||||
);
|
||||
num_float_args += 1;
|
||||
} else if let Some(size) = is_struct(&dtype, structs) {
|
||||
self.translate_addi(
|
||||
asm::Register::arg(asm::RegisterType::Integer, num_int_args),
|
||||
asm::Register::Sp,
|
||||
struct_stack_offsets[&i],
|
||||
&mut context.insts,
|
||||
);
|
||||
num_int_args += 1;
|
||||
if size > 16 {
|
||||
self.translate_addi(
|
||||
asm::Register::arg(asm::RegisterType::Integer, num_int_args),
|
||||
asm::Register::Sp,
|
||||
struct_stack_offsets[&i],
|
||||
&mut context.insts,
|
||||
);
|
||||
num_int_args += 1;
|
||||
} else {
|
||||
match arg {
|
||||
ir::Operand::Register { rid, .. } => match rid {
|
||||
ir::RegisterId::Temp { bid, iid } => {
|
||||
self.translate_addi(
|
||||
asm::Register::T5,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
}
|
||||
_ => todo!(),
|
||||
},
|
||||
_ => todo!(),
|
||||
}
|
||||
|
||||
let struct_name =
|
||||
dtype.get_struct_name().unwrap().as_ref().unwrap().clone();
|
||||
let struct_dtype = structs[&struct_name].clone().unwrap();
|
||||
let fields =
|
||||
struct_dtype.get_struct_fields().unwrap().as_ref().unwrap();
|
||||
|
||||
let mut is_packing = false;
|
||||
let mut packing_start_offset = 0;
|
||||
let mut packing_size = 0;
|
||||
|
||||
for field_dtype in fields {
|
||||
let (offset, _) = struct_dtype
|
||||
.get_offset_struct_field(
|
||||
field_dtype.name().unwrap(),
|
||||
structs,
|
||||
)
|
||||
.unwrap();
|
||||
let field_size = get_dtype_size(&field_dtype, structs);
|
||||
if is_integer(&field_dtype) {
|
||||
if !is_packing {
|
||||
is_packing = true;
|
||||
packing_start_offset = offset;
|
||||
packing_size = field_size;
|
||||
} else {
|
||||
// TODO: 조건 수정 필요
|
||||
if offset
|
||||
== packing_start_offset + (packing_size as usize)
|
||||
&& packing_size + field_size <= 8
|
||||
{
|
||||
packing_size += field_size;
|
||||
} else {
|
||||
context.insts.push(asm::Instruction::IType {
|
||||
instr: asm::IType::LD,
|
||||
rd: asm::Register::arg(
|
||||
asm::RegisterType::Integer,
|
||||
num_int_args,
|
||||
),
|
||||
rs1: asm::Register::T5,
|
||||
imm: asm::Immediate::Value(
|
||||
packing_start_offset as u64,
|
||||
),
|
||||
});
|
||||
num_int_args += 1;
|
||||
packing_start_offset = offset;
|
||||
packing_size = field_size;
|
||||
}
|
||||
}
|
||||
} else if is_float(&field_dtype) {
|
||||
if is_packing {
|
||||
context.insts.push(asm::Instruction::IType {
|
||||
instr: asm::IType::LD,
|
||||
rd: asm::Register::arg(
|
||||
asm::RegisterType::Integer,
|
||||
num_int_args,
|
||||
),
|
||||
rs1: asm::Register::T5,
|
||||
imm: asm::Immediate::Value(
|
||||
packing_start_offset as u64,
|
||||
),
|
||||
});
|
||||
num_int_args += 1;
|
||||
is_packing = false;
|
||||
}
|
||||
|
||||
context.insts.push(asm::Instruction::IType {
|
||||
instr: asm::IType::load(field_dtype.deref().clone()),
|
||||
rd: asm::Register::arg(
|
||||
asm::RegisterType::FloatingPoint,
|
||||
num_float_args,
|
||||
),
|
||||
rs1: asm::Register::T5,
|
||||
imm: asm::Immediate::Value(packing_start_offset as u64),
|
||||
});
|
||||
num_float_args += 1;
|
||||
} else {
|
||||
todo!()
|
||||
}
|
||||
}
|
||||
|
||||
if is_packing {
|
||||
context.insts.push(asm::Instruction::IType {
|
||||
instr: asm::IType::LD,
|
||||
rd: asm::Register::arg(
|
||||
asm::RegisterType::Integer,
|
||||
num_int_args,
|
||||
),
|
||||
rs1: asm::Register::T5,
|
||||
imm: asm::Immediate::Value(packing_start_offset as u64),
|
||||
});
|
||||
num_int_args += 1;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
todo!();
|
||||
}
|
||||
}
|
||||
|
||||
if is_struct(return_type, structs).is_some() {
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Mv {
|
||||
rd: asm::Register::A0,
|
||||
rs: asm::Register::Sp,
|
||||
})); // For returned structure
|
||||
if let Some(size) = is_struct(return_type, structs) {
|
||||
if size > 16 {
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Mv {
|
||||
rd: asm::Register::A0,
|
||||
rs: asm::Register::Sp,
|
||||
})); // For returned structure
|
||||
}
|
||||
}
|
||||
|
||||
match callee {
|
||||
@@ -945,29 +1198,86 @@ impl Asmgen {
|
||||
context,
|
||||
);
|
||||
} else if let Some(size) = is_struct(return_type, structs) {
|
||||
self.translate_addi(
|
||||
asm::Register::A0,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[&rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
self.translate_addi(
|
||||
asm::Register::A1,
|
||||
asm::Register::Sp,
|
||||
0,
|
||||
&mut context.insts,
|
||||
);
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Li {
|
||||
rd: asm::Register::A2,
|
||||
imm: size,
|
||||
}));
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Call {
|
||||
offset: asm::Label(String::from("memcpy")),
|
||||
}));
|
||||
if size > 16 {
|
||||
self.translate_addi(
|
||||
asm::Register::A0,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[&rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
self.translate_addi(
|
||||
asm::Register::A1,
|
||||
asm::Register::Sp,
|
||||
0,
|
||||
&mut context.insts,
|
||||
);
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Li {
|
||||
rd: asm::Register::A2,
|
||||
imm: size,
|
||||
}));
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Call {
|
||||
offset: asm::Label(String::from("memcpy")),
|
||||
}));
|
||||
} else {
|
||||
let struct_name = return_type
|
||||
.get_struct_name()
|
||||
.unwrap()
|
||||
.as_ref()
|
||||
.unwrap()
|
||||
.clone();
|
||||
let struct_dtype = structs[&struct_name].clone().unwrap();
|
||||
let fields =
|
||||
struct_dtype.get_struct_fields().unwrap().as_ref().unwrap();
|
||||
let mut num_int_fields = 0;
|
||||
let mut num_float_fields = 0;
|
||||
|
||||
for field_dtype in fields {
|
||||
let (offset, _) = struct_dtype
|
||||
.get_offset_struct_field(field_dtype.name().unwrap(), structs)
|
||||
.unwrap();
|
||||
if is_integer(&field_dtype) {
|
||||
self.translate_addi(
|
||||
asm::Register::T5,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[&rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
context.insts.push(asm::Instruction::SType {
|
||||
instr: asm::SType::store(field_dtype.deref().clone()),
|
||||
rs1: asm::Register::T5,
|
||||
rs2: asm::Register::arg(
|
||||
asm::RegisterType::Integer,
|
||||
num_int_fields,
|
||||
),
|
||||
imm: asm::Immediate::Value(0),
|
||||
});
|
||||
num_int_fields += 1;
|
||||
} else if is_float(&field_dtype) {
|
||||
self.translate_addi(
|
||||
asm::Register::T5,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[&rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
context.insts.push(asm::Instruction::SType {
|
||||
instr: asm::SType::store(field_dtype.deref().clone()),
|
||||
rs1: asm::Register::T5,
|
||||
rs2: asm::Register::arg(
|
||||
asm::RegisterType::FloatingPoint,
|
||||
num_float_fields,
|
||||
),
|
||||
imm: asm::Immediate::Value(0),
|
||||
});
|
||||
num_float_fields += 1;
|
||||
} else {
|
||||
todo!()
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if struct_stack_allocations > 0 {
|
||||
@@ -987,7 +1297,8 @@ impl Asmgen {
|
||||
self.translate_load_operand(value, rs1, context);
|
||||
|
||||
match (value.dtype(), target_dtype) {
|
||||
(ir::Dtype::Int { .. }, ir::Dtype::Int { .. }) => {
|
||||
(ir::Dtype::Int { .. }, ir::Dtype::Int { .. })
|
||||
| (ir::Dtype::Int { .. }, ir::Dtype::Pointer { .. }) => {
|
||||
self.translate_store_result(&rid, target_dtype.clone(), rs1, context)
|
||||
}
|
||||
(ir::Dtype::Float { .. }, ir::Dtype::Float { .. }) => {
|
||||
@@ -1234,41 +1545,100 @@ impl Asmgen {
|
||||
} else if is_float(&dtype) {
|
||||
self.translate_load_operand(value, asm::Register::FA0, context);
|
||||
} else if let Some(size) = is_struct(&dtype, structs) {
|
||||
context.insts.push(asm::Instruction::IType {
|
||||
instr: asm::IType::load(ir::Dtype::pointer(ir::Dtype::unit())), // TODO: ok?
|
||||
rd: asm::Register::A0,
|
||||
rs1: asm::Register::S0,
|
||||
imm: asm::Immediate::Value(!24 + 1),
|
||||
});
|
||||
match value {
|
||||
ir::Operand::Constant(constant) => match constant {
|
||||
ir::Constant::Undef { .. } => (), // DO nothing
|
||||
if size > 16 {
|
||||
context.insts.push(asm::Instruction::IType {
|
||||
instr: asm::IType::load(ir::Dtype::pointer(ir::Dtype::unit())), // TODO: ok?
|
||||
rd: asm::Register::A0,
|
||||
rs1: asm::Register::S0,
|
||||
imm: asm::Immediate::Value(!24 + 1),
|
||||
});
|
||||
match value {
|
||||
ir::Operand::Constant(constant) => match constant {
|
||||
ir::Constant::Undef { .. } => (), // DO nothing
|
||||
_ => todo!(),
|
||||
},
|
||||
ir::Operand::Register { rid, .. } => match rid {
|
||||
ir::RegisterId::Temp { bid, iid } => {
|
||||
self.translate_addi(
|
||||
asm::Register::A1,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
}
|
||||
_ => todo!(),
|
||||
},
|
||||
_ => todo!(),
|
||||
},
|
||||
ir::Operand::Register { rid, .. } => match rid {
|
||||
ir::RegisterId::Temp { bid, iid } => {
|
||||
self.translate_addi(
|
||||
asm::Register::A1,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
}
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Li {
|
||||
rd: asm::Register::A2,
|
||||
imm: size,
|
||||
}));
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Call {
|
||||
offset: asm::Label(String::from("memcpy")),
|
||||
}));
|
||||
} else {
|
||||
match value {
|
||||
ir::Operand::Constant(constant) => match constant {
|
||||
ir::Constant::Undef { .. } => (), // DO nothing
|
||||
_ => todo!(),
|
||||
},
|
||||
ir::Operand::Register { rid, .. } => match rid {
|
||||
ir::RegisterId::Temp { bid, iid } => {
|
||||
self.translate_addi(
|
||||
asm::Register::T5,
|
||||
asm::Register::S0,
|
||||
context.stack_offsets[rid],
|
||||
&mut context.insts,
|
||||
);
|
||||
}
|
||||
_ => todo!(),
|
||||
},
|
||||
_ => todo!(),
|
||||
}
|
||||
|
||||
let struct_name =
|
||||
dtype.get_struct_name().unwrap().as_ref().unwrap().clone();
|
||||
let struct_dtype = structs[&struct_name].clone().unwrap();
|
||||
let fields = struct_dtype.get_struct_fields().unwrap().as_ref().unwrap();
|
||||
let mut num_int_fields = 0;
|
||||
let mut num_float_fields = 0;
|
||||
|
||||
for field_dtype in fields {
|
||||
let (offset, _) = struct_dtype
|
||||
.get_offset_struct_field(field_dtype.name().unwrap(), structs)
|
||||
.unwrap();
|
||||
if is_integer(&field_dtype) {
|
||||
context.insts.push(asm::Instruction::IType {
|
||||
instr: asm::IType::load(field_dtype.deref().clone()),
|
||||
rd: asm::Register::arg(
|
||||
asm::RegisterType::Integer,
|
||||
num_int_fields,
|
||||
),
|
||||
rs1: asm::Register::T5,
|
||||
imm: asm::Immediate::Value(offset as u64),
|
||||
});
|
||||
num_int_fields += 1;
|
||||
} else if is_float(&field_dtype) {
|
||||
context.insts.push(asm::Instruction::IType {
|
||||
instr: asm::IType::load(field_dtype.deref().clone()),
|
||||
rd: asm::Register::arg(
|
||||
asm::RegisterType::FloatingPoint,
|
||||
num_float_fields,
|
||||
),
|
||||
rs1: asm::Register::T5,
|
||||
imm: asm::Immediate::Value(offset as u64),
|
||||
});
|
||||
num_float_fields += 1;
|
||||
} else {
|
||||
todo!()
|
||||
}
|
||||
_ => todo!(),
|
||||
},
|
||||
_ => todo!(),
|
||||
}
|
||||
}
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Li {
|
||||
rd: asm::Register::A2,
|
||||
imm: size,
|
||||
}));
|
||||
context
|
||||
.insts
|
||||
.push(asm::Instruction::Pseudo(asm::Pseudo::Call {
|
||||
offset: asm::Label(String::from("memcpy")),
|
||||
}));
|
||||
}
|
||||
self.translate_epilogue(context);
|
||||
}
|
||||
|
||||
@@ -2126,7 +2126,12 @@ impl IrgenFunc<'_> {
|
||||
lhs_dtype
|
||||
}
|
||||
}
|
||||
_ => todo!("merge_dtype"),
|
||||
(&ir::Dtype::Pointer { .. }, &ir::Dtype::Int { .. }) => lhs_dtype,
|
||||
(&ir::Dtype::Int { .. }, &ir::Dtype::Pointer { .. }) => rhs_dtype,
|
||||
_ => {
|
||||
println!("{:?} {:?}", lhs_dtype, rhs_dtype);
|
||||
todo!("merge_dtype")
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user